CPU evolution in performancelcost continues to drive the packaging technology. The limitations of wire bonded interconnects and traditional C4ICeramic flip chip have resulted in development of a new paradigm for CPU packaging involving area array solder bump connections to a high density organic multi layer LGA package. This paper describes some of the key reasons behind this transition. It introduces the key aspects of the new assembly process architecture, associated process flows and key yieldreliability issues addressed during the development.