ABSTRACT:Frequency is one of the important parameters to be intercepted for the hostile radars. Digital instantaneous frequency measurement (DIFM) receiver is the mostly used frequency receiver in EW system. The main concern of the DIFM Rx is: Low sensitivity, Low frequency accuracy and fails to handle simultaneous (time overlapped) signals.Sensitivity refers to the minimum RF level at the input of the receiver channel. To do this, a decision making process must take place. The decision is the crossing of a voltage threshold set at a level above the noise floor, representing the number of decibels above random noise that a voltage, signal or noise must attain to assure a certain false alarm rate.The setting of threshold is an important factor in establishing the receiver operating sensitivity, since the higher it is set to reduce false alarms, the greater the signal amplitude necessary to be recognized as a signal to be processed. The proposed design aims to find out the method to improve the Constant False Alarm Rate detector performance by increasing the threshold value and simultaneously enhancing the sensitivity of the system. This technique will be analyzed in MATLAB and implemented on FPGA based digital board through VHDL.