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Image processing is an important task in data processing systems for applications such as medical sectors, remote sensing, and microscopy tomography. Edge recognition is a sort of image division method that is used to simplify the image records so as to reduce the amount of data to be processed. Edges are considered the most important in image processing because they are used to characterize the boundaries of an image. The performance of the Canny edge recognition algorithm remarkably surpasses the present edge recognition technology in various computer visualization methods. The main drawback of using Canny edge boundary is that it consumes lot of period due to its complex computation. In order to tackle this problem a hybrid edge recognition method is proposed in block stage to locate edges with no loss. It employs the Sobel operator estimate method to calculate the value and direction of the gradient by substituting complex processes by hardware cost savings, traditional non-maximum suppression adaptive thresholding block organization, and conventional hysteresis thresholding. Pipeline was presented to lessen latency. The planned strategy is simulated using Xilinx ISE Design Suite14.2 running on a Xilinx Spartan-6 FPGA board. The synthesized architecture uses less hardware to detect edges and operates at maximum frequency of 935 MHz.