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ValeroAbstract Vehicular communications are receiving considerable attention due to the introduction of the intelligent transportation system (ITS) concept, enabling smart and intelligent driving technologies and applications. To design, evaluate and optimize ITS applications and services oriented to improve vehicular safety, but also non-safety applications based on wireless systems, the knowledge of the propagation channel is vital. In particular, the mean path loss is one of the most important parameters used in the link budget, being a measure of the channel quality and limiting the maximum allowed distance between the transmitter (Tx) and the receiver (Rx). From a narrowband vehicular-to-vehicular (V2V) channel measurement campaign carried out at 5.9 GHz in three different urban environments characterized by high traffic density, this paper analyzes the path loss in terms of the Tx-Rx separation distance and fading statistics. Based on a linear slope model, values for the path loss exponent and the standard deviation of shadowing are reported. We have evaluated the packet error rate (PER) and the maximum achievable Tx-Rx separation distance for a PER threshold level of 10% according to the digital short-range communications (DSRC) specifications. The results reported here can be incorporated in an easy way to vehicular networks (VANETs) simulators in order to develop, evaluate and validate new protocols and systems architecture configurations under realistic propagation conditions.

SRAM and DRAM cells have been the predominant technologies used to implement memory cells in computer systems, each one having its advantages and shortcomings. SRAM cells are faster and require no refresh since reads are not destructive. In contrast, DRAM cells provide higher density and minimal leakage energy since there are no paths within the cell from Vdd to ground. Recently, DRAM cells have been embedded in logic-based technology, thus overcoming the speed limit of typical DRAM cells.In this paper we propose an n-bit macrocell that implements one static cell, and n-1 dynamic cells. This cell is aimed at being used in an n-way set-associative first-level data cache. Our study shows that in a four-way set-associative cache with this macrocell compared to an SRAM based with the same capacity, leakage is reduced by about 75% and area more than half with a minimal impact on performance. Architectural mechanisms have also been devised to avoid refresh logic.Experimental results show that no performance is lost when the retention time is larger than 50K processor cycles. In addition, the proposed delayed writeback policy that avoids refreshing performs a similar amount of writebacks than a conventional cache with the same organization, so no power wasting is incurred.

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Abstract-This paper presents a method for the analysis of arbitrary shape and composition posts in waveguide. The method segments the problem into regions that are characterized by their generalized admittance matrices. Both an analytical formulation and a boundary integral formulation based on homogeneous wave equation solutions are used in this characterization. Our method is especially fast and suitable for real time computer-aided design tools because only the changing parameters would have to be computed in a design process. This method also makes a simple combination of different numerical techniques possible.