this paper describes a statistical design approach used in the Pineview Atom-based SoC products for next generation Netbook/Nettop markets. The Pineview achieves low power, high performance, and high yield goals. Fabrication process variation in advanced submicron semiconductor introduces new challenges to design team. The process variations are modeled using a statistical approach and factored into timing convergence and low power convergence. A statistical post-silicon power model is also used to further optimize yields and bin-split for power and performance of manufactured dies.We explain tradeoffs and optimization considerations for different IP blocks of Pineview SoC.