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This paper introduces a pulse injection-locked oscillator (PILO) that provides low jitter clock multiplication of a clean input reference clock. A mostly-digital feedback circuit provides continuous tuning of the oscillator such that its natural frequency is locked to the injected frequency. The proposed system is demonstrated with a prototype consisting of a custom 0.13 m integrated circuit with active area of 0.4 mm 2 and core power of 28.6 mW, along with an FPGA, a discrete DAC and a simple RC filter. Using a low jitter 50 MHz reference input, the PILO prototype generates a 3.2 GHz output with integrated phase noise, reference spur, and estimated deterministic jitter of 130 fs (rms), 63.9 dBc, and 200 fs (peak-to-peak), respectively.

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