<p>Antennas are long used for communication of data since a century and their usage has been diversified over the past two decades and the antennas also entered the domain of medical fields. A rectangular microstrip patch antenna has been designed on a substrate integrated waveguide with frequency selective surface which is in the shape of a square. The design of this antenna with SIW are done by using CST on a low cost FR4 substrate where є<sub>r</sub> =4.4, h=1.58 mm and tan δ=0.0035. The SIW structure merit is utilized on the traditional FSS is simulated and verified by using CST.</p>
In this paper the design of low power SRAM has been presented. SRAM memory cell has been realized using adiabatic logic to achieve low power operation. Adiabatic SRAM has been realized using two methods such as i) gradual charging and discharging of bit-line during writing mode and ii) utilizing control transistor based adiabatic circuit i.e., Two Phase Adiabatic Dynamic Logic (2PADL) circuit for the design of memory cell. Furthermore, energy recovery of word line and bit line charge stored in the interconnect capacitances has been realized for the benefit of energy savings. Charge recovery circuits based on 2PADL has been employed in the proposed SRAM memory core to achieve energy recovery. SRAM memory array of (4×4) has been designed as a test circuit. All the circuits are implemented using 180nm CMOS technology and simulations are carried out using Cadence® Virtuoso tool. Simulation results prove that the proposed memory cell has significant amount of energy savings when compared to the conventional static CMOS SRAM cell.
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