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Elimination of redundant data has become a critical concern in the design of storage architectures. Content addressable storage engines eliminate data at the block level by mapping data blocks with the same content to the same physical storage location. Intelligent object partitioning techniques leverage block level content addressing in order to improve duplicate elimination. In this paper, we propose a novel object partitioning technique -fingerdiff that is designed to improve storage consumption of existing object partitioning techniques while at the same time reducing associated costs. We present a detailed evaluation of fingerdiff and other existing object partitioning schemes, and we show that fingerdiff meets its design goals as it improves the effectiveness of block level duplicate elimination while reducing overhead costs.

General questions Question f) How well does UK IP system promote innovation? Patents In areas where it is appropriate and managed properly, if the benefits outweigh the costs and are superior to alternative mechanisms, the patent system can play a positive role in stimulating innovation, and enhancing economic growth and improved quality of life for the benefit of all in society. The challenge is to design a patent system that does not present excessive costs on society, through for example unreasonable restrictions on access to new inventions, or harm to other non-patent systems that would otherwise stimulate inventive activity. The patent system is only used in certain areas of the economy. Some types of inventive activity are not subject to patents, and some types of research and development do not benefit from patent protection. The limited role for the patent system is deliberate, and recognizes the importance of other mechanisms, incentives, rewards, tendencies, and forces in the process of innovation and progress in the arts and sciences.

The network interfaces of existing multicomputers require a significant amount of software overhead to provide protection and to implement message passing protocols.This paper describes the design of a low-latency, high-bandwidth, virtual memory-mapped network interface for the SHRIMP multicomputer project at Princeton University. Without sacrificing protection, the network interface achieves low latency by using virtual memory mapping and write-latency hiding techniques, and obtains high bandwidth by providing a user-level block data transfer mechanism. We have implemented several message passing primitives in an experimental environment, demonstrating that our approach can reduce the message passing overhead to a few user-level instructions.

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