The voltage-frequency island (VFI) design paradigm has strong potential for achieving high energy efficiency in emerging communication centric many-core system-on-chip (SoC) technology called network-on-chip (NoC). In VFI design, each core is allocated into a suitable domain with different voltage and frequency considering the required workload. Most VFI NoC studies have focused on regular topologies. However, today's diversified applications demand custom NoC topologies to accommodate heterogeneous many-core architectures. In this paper, we propose a low-power custom topology generation method for constructing VFI NoCs, which embraces irregular topologies. The main objective of this work is to minimize energy consumption and communication resources, hence improving communication efficiency.

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