Absfruct-The threshold gate is a very good candidate in the redimtion of order statistic filtering. In thls brief paper, a simple procedure iP developed to determine the dmnit parameters for a set of output-wired CMOS inverters in order to Implement threshold functions for order statistic BLtering. Weighted and nonweighted order statistie filters in either hinary or integer domalo can be easily realized in similar architectures. An incremental scheme is also proposed to construct threshold gate networks for general or multistage order statistic filters.

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Binary majority gate that selects the majority from binary inputs is a very essential element in decision-making circuitries which have applications in fault-tolerant computing systems, artificial neural networks, or related applicatbns. A novel design of majority gate composed of output-wired inverters is proposed. The transistors are fewer than other digital or analcg implementations. It is also easier to design than analog ways with OP amplifiers. A bit-level median filtering algorithm is proposed and realized into hardware architecture. In this design, the majority gate is applied to choose the median result. Such design consumes fewer gate counts than some similar designs and take constant cycle time, independent of window length or word size. A bit-level scalable median filter architecture for two-dimensional signal smoothing is also proposed.

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