memory units. In addition, each memory unit is located between the corresponding WWL and WBL. A novel one-transistor-and-two-uneven-magnetic tunneling junctions (IT2UMTJ) cell with toggle switching mode is proposed to increase the packing density and to secure the writing selectivity. _ iL Besides, a four-state sense amplifier is proposed to reduce the read access time to less than 25 ns for two accessing data in one cycle.
RBl_With adequate I/O stages, the IT2UMTJ toggle MRAM architecture has a double word length or alternatively has a high read/write bandwidth. The two-bit data can be read from or written into a selected memory cell of 1T2UMTJ toggle MRAM within one clock cycle, therefore, demonstrating the promising property of high bandwidth processing capability. RXV Fig. 1. Three-dimensional structure of the proposed lT2UMTJ toggle MRAM cell. The WBL is below the memory unit and the WWL is
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