{ This paper describes the use of Unied System Construction tools under development at the University of Southern California. The goal of the project is to automate the construction of heterogeneous, applicationspecic systems. Key elements of the USC system include multiprocessor synthesis, multi-chip datapath synthesis, memory-intensive synthesis, and multi-chip partitioning. The tools were applied to design of an image compression chip set, and results of using these tools are reported on here. Our results are c omparable to manual designs reported in the literature.

No abstract

Architectural Power some academic duction chip design until alternatives are available. Predictor design, which should benefit on-going research on automated solutions. use of converters is feasible when required.