This paper presents guidelines for the deep reactive ion etching (DRIE) of silicon MEMS structures, employing SF 6 O 2 -based high-density plasmas at cryogenic temperatures. Procedures of how to tune the equipment for optimal results with respect to etch rate and profile control are described. Profile control is a delicate balance between the respective etching and deposition rates of a SiO F passivation layer on the sidewalls and bottom of an etched structure in relation to the silicon removal rate from unpassivated areas. Any parameter that affects the relative rates of these processes has an effect on profile control. The deposition of the SiO F layer is mainly determined by the oxygen content in the SF 6 gas flow and the electrode temperature. Removal of the SiO F layer is mainly determined by the kinetic energy (self-bias) of ions in the SF 6 O 2 plasma. Diagrams for profile control are given as a function of parameter settings, employing the previously published "black silicon method". Parameter settings for high rate silicon bulk etching, and the etching of micro needles and micro moulds are discussed, which demonstrate the usefulness of the diagrams for optimal design of etched features. Furthermore it is demonstrated that in order to use the oxygen flow as a control parameter for cryogenic DRIE, it is necessary to avoid or at least restrict the presence of fused silica as a dome material, because this material may release oxygen due to corrosion during operation of the plasma source. When inert dome materials like alumina are used, etching recipes can be defined for a broad variety of microstructures in the cryogenic temperature regime. Recipes with relatively low oxygen content (1-10% of the total gas volume) and ions with low kinetic energy can now be applied to observe a low lateral etch rate beneath the mask, and a high selectivity (more than 500) of silicon etching with respect to polymers and oxide mask materials is obtained. Crystallographic preference etching of silicon is observed at low wafer temperature ( 120 C). This effect is enhanced by increasing the process pressure above 10 mtorr or for low ion energies (below 20 eV).[720]Index Terms-Cryogenic etching, profile control, reactive ion etching (RIE).

While etching high aspect ratio trenches into silicon with reactive ion etching (POE) using an SFJO2 chemistry it is observed that the etch rate is depending on the mask opening. This effect is known as POE lag and is caused by the depletion of etching ions and radicals or inhibiting neutrals during their trench passage. In order to decide which source is the main cause, we constructed special "horizontal trenches" where only radicals are controlling the etching. The experiment showed that radicals are not responsible for POE lag. Inhibitor depletion will result in inverse POE lag. This effect is not found during our experimentation which leaves us with ion depletion to explain POE lag. Depletion of ions is caused by ions captured by the sidewalls due to the angular distribution of incoming ions into the trench opening and the deflection of ions in the trench due to electrostatic fields• The analysis given in this paper indicates that the influencing field causes ion deflection, ion depletion, and therefore POE lag in micron-sized Si trenches for low-energetic ions• In all cases, thus independent of the feature size, the angular distribution of incoming ions is thought to have a major contribution to RIE lag at higher pressures. These phenomena will be treated theoretically and simulated using a program, written in c++ under windows, in order to give a quantitative analysis of RIE lag.

This paper presents a technique to pattern materials in deep holes and/or on non-planar sub,clinic surfaces. A rather old technique, namely, electron-beam evaporation of metals through a shadow mask, is used. The realization of high-resolutian shadow masks using mieromachining techniques is described. Further, a low ohmic electrical wafer fred-through with a small parasitic capacitance to the substrate and a high placing density is presented.

SUMMARYThis paper presents a technique to pattern materials in deep holes andor on non-planar substrate surfaces. A rather old technique, E-beam evaporation of metals through a shadow mask, is used [l]. The realisation of high resolution shadow masks using micromachining techniques is described. Further, a low ohmic electrical wafer feed through with a small parasitic capacitance to the substrate and a high placing density is presented.

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