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Abslmcl-The design and implementation of gm-C filter with on-chip automatic tuning drcuit is described. 'Ransitioapl -elChebyshev filter is implemented to compromise between high attenuation and low groupdelay variation. The a d t is fabricated with 0.18pm CMOS pwith &metal single poly. The filter operates at a cutoff frequency of loMHz with a single 1 3 V supply voltage. The measurement results shows an altenuatiou of 7OdB at stopband can he achieved, whlle keeping a low gmupdelay variation of less than 7nSee up-to 1.5 limes of cutoff fmqnency. ?%e cutoff frequency epll be linearly tuned from 4MHz to 10-through the t u h g loop. By employhg relaxation oscillator, accurate and ruhnst frequency tuning scheme is implemented. M d with sutliaent samples, the frequency tuning drmtt shows an mtoa frequency tuning enur of less than 7.0% over wide range of supply voltages (13V to 2.1V) and operating temperatnres (-40°C to +85"C) in the whole tuning range.

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A multi-band (bands I, II, V, VIII [option]) single-chip RFIC has been implemented in 0.18μm SiGe BiCMOS process for WCDMA/HSDPA applications. The direct-conversion receiver achieves competitive system performance: -110.5dBm sensitivity, 20dB and 12dB blocking margin for ACS case 1 and case 2, respectively, and excellent in-band blocking margins. The direct-modulation transmitter achieves more than 90dB dynamic range, and excellent EVM performance: <3.5%. In Band I, the RX section and TX section draw each 35mA and 65mA, respectively. Two dedicated on-chip fast-settling fractional-N synthesizers provide LOs for both RX and TX. The chip is housed in a 5x5 mm 2 81-pin VFBGA package.

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