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We observed the reflectance spectra of three different nano-scale array structures of Au-coated silicon nanorods. The trends of the reflectance spectra indicate that the localized surface plasmon modes can be spatially controlled by manipulating geometric parameters, namely the lattice constants of the array. In addition, the experimental results were compared with 2D numerical simulations based on the finite element method. Satisfactory agreement between the experimental observations and numerical results was obtained.

In this study, ferroelectric FETs (FeFETs) and CMOS inverters are fabricated and analyzed, exhibiting 13% of 593 devices with sub-60 mV subthreshold swing (SS) at room temperature. Forming gas annealing (FGA) is found to not only enhance ferroelectricity but also significantly improve FeFET electrostatics. The experimental results indicate that FeFET with a narrow width shows weaker ferroelectric properties, and SS of sub-60 mV/dec with I D change less than two orders of magnitude. However, FeFET with a broad channel width reveals stronger ferroelectric properties, and SS of sub-60 mV/dec is over 2 orders of magnitude of I d. Finally, typical voltage transfer characteristics (VTCs) of a FeFET CMOS inverter with double sweeps at various V D from 0.6 to 2 V are demonstrated. The results show that hysteresis in a FeFET CMOS inverter could have both clockwise (CW) and counterclockwise (CCW) loops. INDEX TERMS FeFET, forming gas annealing (FGA), steep slop, HfZrO 2 , ferroelectric.