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The results of the computational-experimental investigations of high frequency and noise prop erties of SOI MOS transistors and passive elements of 0.35 µm domestic digital CMOS SOI technology are presented. New elements absent in the library composition and necessary to construct the monolithic micro wave functional blocks are constructed. The results of design and experimental investigations of the crystals of generating, amplifying, and mixing functional units with operational frequencies of 1.2-1.65 GHz are pre sented. Based on the results of analysis of the computational-experimental simulation, the possibility in principle to design the monolithic LSI of the radio receiver of satellite navigation based on the domestic CMOS SOI technology with frequencies of 1.2-1.6 GHz and hardness levels up to 10 12 unit/s and 10 6 units is confirmed.

This paper describes the architecture, system analysis and implementation of world-wide regulation compliant UHF RFID reader transceiver for ISO 18000-6 multi-class tags in the ISM band 860 MHz-960 MHz. The presented considerations are based on a system analysis providing evaluation of the transceiver's building blocks parameters in accordance with the required characteristics of a complete RFID reader system, read range, data transmission rate, reading speed and power consumption. The Phase Noise, Noise Figure, Sensitivity, P1dB, Dynamic Range are estimated for the design of a custom 'system-in-package' transceiver, implemented in LTCC-module. Based on the direct-conversion architecture, the reader transceiver integrates RFblocks, frequency synthesizer, modulation and demodulation functions, low frequency analog baseband. The receiver sensitivity is down to -85 dBm, the transmitter produces output power of +17 dBm.

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