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Turbo decoding for the advanced 4GPP-LTE wireless communication standard is the most challenging technique in terms of computational complexity and power consumption of corresponding cellular devices. The standard VLSI implementation of turbo decoder requires memory, latency, area, power, and throughput. These particularities cannot tolerate in some applications as well as the previous method of floating point has some pitfalls due to this; the performance is degraded. The novel fixed point technique for SISO parallel advanced long-term evolution turbo decoders with new hard-wried 6144 bit interleaver is proposed here to achieve the specification. The major contribution of the planned methodology is the enhancement of throughput in parallel SISO decoders by eliminating the critical data path problem in floating point method. The signal to noise ratio is calculated to reduce the power consumption, and zero state metrics are used to eliminate the bit error rate. The designed algorithms are used to enhance the error correction capacity.

In the original publication, the cross reference of the corresponding author affiliation was wrong. It should be "Chockalingam Singaravel 1 ". The original article has been corrected.