In this paper, the complementary and selective characteristics of ECL (Emitter-Coupled Logic) circuit are fully taken advantage to implement various logic gates including MUX, XOR, AND, NAND, OR, and so on. From the analysis, we find that one ECL circuit can realize many relative logic functions, which is more flexible than CMOS logic. We conclude that if the characteristics of ECL circuit are fully taken advantages, the design of logic functions can be very easy.
A structure of ADCs which combines fold-interpolation and pipeline is introduced, as well as corresponding digital calibration method. The simulation shows that the performances of the ADC after calibration are improved a lot. The SFDR achieves 62dB at a sampling rate of 800MHz, when the input analog signal is at 397MHz.
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