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Specifications for a fiv~channel differential transceiver for the FASTBUS Cable Segment have been developed.1*z The transceiver, CSX, is being planned as a full-custom integrated circuit implementation.Specification and development plans are discussed. The project is being carried out in collaboration with the NIM/FASTBUS Committee.

This paper will provide a demonstration of basic FASTBUS hardware and test software.The systems will include single crate segments, simple computer I/O, a fast sequencer and memory, some simple diagnostic and display devices and a UNIBUS to FASTBUS processor interface.The equipment will be set up to show the basic FASTBUS protocols and timing transactions, as well as some of the general initialization software features.

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