An efficiency-enhanced fully integrated power amplifier (PA) for wireless local area networks (WLANs) was implemented based on the GaAs heterojunction bipolar transistor (HBT) process. A harmonic tuning network that can absorb the parasitic inductance of the bonding wires is proposed, which reduces the chip area significantly. The network provides nearly optimum fundamental and second harmonic impedances from 5.0 to 5.5 GHz. Additionally, a novel adaptive bias circuit that corrects the AM-AM and AM-PM distortion and improve thermal stability at high input power was proposed. With a chip dimension of only 1.06 mm 2 , the PA achieves a gain of 31.1-31.6 dB and saturated power of 29.9-30.3 dBm with a peak power-added efficiency (PAE) of 49.3%-51.8% across 5.0-5.5 GHz. The PA also shows an output power of 22.1 dBm (EVM=-32 dB) with 18.4% PAE under an 802.11ac MCS9 VHT160 test signal. In addition, the PA delivers 17.5 dBm (EVM=-42 dB) output power when tested with the 802.11ax MCS11 VHT160 signal at 5.25 GHz.

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