In the clock synchronization of the closed area network (such as local area network (LAN) and metropolitan area network (MAN)) to the wide area network, it is advantageous to use the hybrid synchronization from the viewpoint of reliability, where the master-slave synchronization is applied at several points from the wide area network, and the mutual synchronization is applied within the closed area network.This paper considm the case where the hybrid synchronization is applied to the ring-type area network and derives the condition for the existence of the stable phase state. When the synchronization circuit is a twoinput complete integrating second-order PLL with the sinusoidal or equilateral triangular phase comparator characteristic, the sufficient condition for the existence of the stable phase state of the whole network is that the ratio of the gain for the mutual synchronization to the gain for the master-slave synchronization is less than 1 in at least one PLL. When the synchronization circuit is the incomplete integrating PLL, the sufficient condition is that the above gain ratio is less than a certain limit in at least one PLL, and the ratio is above the inverse of that limit in other PLL, where the limit is less than 1 and is determined by the difference between the input frequency from the wide area network and the center frequency of PLL as well as the magnitude of the gain. The above properties are shown theoretically and are verified also by computer simulation.

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The hybrid clock synchronization method locks subordinately to the external wide‐area network while mutual locking is used within the network. This method has excellent reliability as a clock synchronization method for a local network. By using a dual‐input phase lock loop (PLL), nodes that can obtain clocks externally are connected in a ring and are used as the higher level nodes in the proposed method. In this configuration of the synchronization network, other nodes are treated as lower‐level nodes which obtain clocks from higher‐level nodes. In this paper, the pull‐in range of the synchronization network in this configuration is obtained. First, the waveform connection condition within the PLL is obtained when the output frequency of the PLL coincides with that of one of the inputs (with a smaller synchronization gain). From this result, the range is derived for the output frequency to move toward the input frequency. This is considered as the operating pull‐in range. It is shown that the pull‐in range of the entire ring network is the minimum value of the dynamic pull‐in range among all of the nodes. Also, the pull‐in range of the lower level nodes is considered in the state after convergence of the ring network. It is shown that the pull‐in range becomes the minimum in the situation where the phases of the two inputs are opposite. The above observations are confirmed by simulation. © 1999 Scripta Technica, Electron Comm Jpn Pt 1, 82(6): 45–59, 1999