No abstract

No abstract

This brief presents a data-pattern-tolerant adaptive equalizer using the spectrum balancing method. In addition to a high-frequency boost control loop, this equalizer has a corner frequency control loop to guarantee its accurate adaptation for various data patterns and data rates. Measured results show that the jitter of the eye is reduced by a maximum of 37% when compared to the previous spectrum balancing equalizer. The chip is fabricated in a 0.18-μm CMOS process, and the equalizer core occupies 0.35 mm 2 and consumes 85 mW.Index Terms-Adaptive equalizer, channel loss, data pattern, intersymbol interference (ISI).