The chemical vapor deposition process at atmospheric pressure has been investigated analytically and numerically with a model based on the continuum transport equation and the surface reaction kinetics. Specifically, a linear stability analysis has been carried out to find some critical parameters for the control of the deposition layer morphology, and numerical analysis based on the boundary integral technique has also been performed to understand critical factors in the step coverage control for the trenches of various geometries. From the analyses, it has been found that the ratio of gas phase diffusivity to the surface reaction rate constant (D/k) plays the most critical role in both the step coverage and morphology stability, while the surface migration and surface reaction kinetics have only minor effects on the step coverage.) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 138.38.0.53 Downloaded on 2015-06-28 to IP

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The quality of silicon wafers used as substrates for microelectronic devices is measured in terms of the type, size and density of defects formed during crystal growth process. The native point defects such as vacancies and self-interstitials diffuse, react and aggregate to form intrinsic defects in the silicon wafers. We investigated the point defect behaviour using the kinetic lattice Monte Carlo (KLMC) model. The KLMC method has been applied extensively in various forms to the study of microdefects in silicon wafers. The purpose of this paper is to demonstrate the phenomena of void defect formation. The size and density of void defects are usually affected by system temperature, vacancy -vacancy reaction and vacancyimpurity reaction. In this paper, we study the temperature effect and the vacancy concentration effect. The simulation results with various temperatures are well matched with our experimental data, and the relationship between temperature and vacancy density describes well the phenomena of void defect formation. This is the first time such KLMC simulation results have been reported.

Defect generation was usually predicted by using the V/G (where V is growth rate and G is axial temperature gradient at the interface of melt/solid) theory, but it was hard to get appropriate critical V/G value and the value could not show the distribution of grown-in defects. Otherwise, direct defect simulation is a very useful method of interpreting initial point defect behavior and micro void generation. In this research, the direct defect simulation was preformed with variable process parameters and optimized by comparing with experiment results. With optimized direct defect analysis, the critical V/G value was modified as 0.00155 cm2 min-1 K-1. The critical pulling rate range was defined as that has low residual point defect concentration in silicon crystal, thus a high-quality wafer can be obtained at the critical pulling rate. The initial point defect distribution and the critical pulling rate range were analyzed by using direct defect model. Additionally, the generation of micro void density was also calculated with variable pulling rates and compared with experiment results. In this research, the initial point defect incorporation and the tendency of micro void generation were well explained by using direct defect model.