This paper reports comparative analyses of phase noise in Hartley, Colpitts, and common-source cross-coupled differential pair LC oscillator topologies in 28 nm CMOS technology. The impulse sensitivity function is used to carry out both qualitative and quantitative analyses of the phase noise exhibited by each circuit component in each circuit topology with oscillation frequency ranging from 1 to 100 GHz. The comparative analyses show the existence of four distinct frequency regions in which the three oscillator topologies rank unevenly in terms of best phase noise performance, due to the combined effects of device noise and circuit node sensitivity.
SUMMARYThis paper reports the analyses of three techniques for phase noise reduction in the complementary metaloxide semiconductor (CMOS) Colpitts oscillator circuit topology. Namely, the three techniques are inductive degeneration, noise filter, and optimum current density. The design of the circuit topology is carried out in 28-nm bulk CMOS technology. The analytical expression of the oscillation frequency is derived and validated through circuit simulations. Moreover, the theoretical analyses of the three techniques are carried out and verified by means of circuit simulations within a commercial design environment. The results obtained for the inductive degeneration and noise filter show the existence of an optimum inductance for minimum phase noise. The results obtained for the optimum bias current density technique applied to a Colpitts oscillator circuit topology incorporating either inductive degeneration or noise filter show the existence of an optimum bias current density for minimum phase noise. Overall, the analyses show that the adoption of these techniques may lead to a potential phase noise reduction up to 19 dB at a 1-MHz frequency offset for an oscillation frequency of 10 GHz.
Comparative Phase Noise analyses of common-source cross-coupled pair, Colpitts, Hartley and Armstrong di®erential oscillator circuit topologies, designed in 28 nm bulk CMOS technology in a set of common conditions for operating frequencies in the range from 1 GHz to 100 GHz, are carried out in order to identify their relative performance. The impulse sensitivity function (ISF) is used to carry out qualitative and quantitative analyses of the noise contributions exhibited by each circuit component in each topology, allowing an understanding of their impact on phase noise. The comparative analyses show the existence of¯ve distinct frequency regions in which the four topologies rank unevenly in terms of best phase noise performance. Moreover, the results obtained from the ISF show the impact of°icker noise contribution as the major e®ect leading to phase noise degradation in nanoscale CMOS LC oscillators.
SUMMARYThis paper presents a 67GHz LC oscillator exploiting a three-spiral transformer and implemented in 65nm bulk complementary metal-oxide-semiconductor technology by STMicroelectronics. The three-spiral transformer allows operating with a lower voltage supply, still obtaining good phase noise performance, and achieving a compact design. Measured performances when supplied with 1.2 V are: oscillation frequency of 67 GHz, phase noise (PN) equal to À96 dBc/Hz at 1 MHz frequency offset from the carrier, power consumption (P C ) equal to 19.2 mW and figure of merit (FOM) equal to À179.7 dB/Hz. Measured performances when supplied with 0.6 V are: oscillation frequency of 67 GHz; PN equal to À88.7 dBc/Hz at a 1 MHz frequency offset from the carrier; P C equal to 3.6 mW and FOM equal to À179.7 dB/Hz.
SUMMARYThis paper reports a phase noise analysis in a differential Armstrong oscillator circuit topology in CMOS technology. The analytical expressions of phase noise due to flicker and thermal noise sources are derived and validated by the results obtained through SpectreRF simulations for oscillation frequencies of 1, 10, and 100 GHz. The analysis captures well the phase noise of the oscillator topology and shows the impact of flicker noise contribution as the major effect leading to phase noise degradation in nano-scale CMOS LC oscillators.
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