The Collider Detector at Fermilab is approaching the completion of the Silicon Vertex Detector upgrade for Run II. The Port Card is a Beryllia multichip module developed to control, read out, and regulate power for the silicon strip readout chips. It has two rad-hard Application Specific Integrated Circuits, parallel fiber optic transmitters, and voltage regulators. It resides 14 cm from the accelerator beam inside the tracking volume. The function and location of the Port Card impose severe constraints on its design. This paper presents the Port Card, and describes the adopted solutions to address the main design issues, as well as the result of many characterization tests.

A test stand for the next generation of the Silicon Vertex Detector (SVX-11) of the Collider Detector Facility (CDF) at Fermilab has been developed. It is capable of performing cosmic ray, beam, and laser pulsing tests on silicon strip detectors using the new generation of SVX chips. The test stand is composed of a SGI workstation, a VME CPU, the Silicon Test Acquisition and Readout (STAR) board, the Test Fiber Interface Board (TFIB), and the Test Port Card (TPC). The STAR mediates between external stimuli for the different tests and produces appropriate high level commands which are sent to the TFIB. The TFIB, in conjunction with the TPC, translates these commands into the correct logic levels to control the SVX chips. The four modes of operation of the SVX chips are configuration, data acquisition, digitization, and data readout. The data read out from the SVX chips is transferred to the STAR. The STAR can then be accessed by the VME CPU and the SGI workstation for future analyses. The detailed description of this test stand will be given.