A column readout circuit with proposed dual integration CDS for low pattern noise infrared imager is presented. By using an extra integration, the dual integration CDS effectively reduces the level of column and row noise (CN and RN) and column fixed pattern noise (CFPN) in an infrared image. In addition, a time flexible integration technique minimizes the penalty of readout time by a dual operation. Simulation of a 0.18 µm CMOS implementation suggests that CN can be reduced by 68%, RN by 71%, and CFPN by 95% compared with a column readout circuit with conventional CDS.