This paper describes the power stage design, control, and performance evaluation of a 13.2 kV/10 kVA solid-state-transformer (SST) for a power distribution system. The proposed SST consists of 10 modules where each individual module contains a unidirectional three-level power factor correction (PFC) converter for the active-front-end (AFE) stage and an LLC resonant converter for the isolated DC-DC stage. The operating principles of the converters are analyzed and the modulation and the control schemes for the entire module are described in detail. The DC-link voltage imbalance is also less than other SST topologies due to the low number of uncontrollable switching states. In order to simplify the control of the power stage, a modulation strategy for the AFE stage is proposed, and the modulation frequency of the LLC converter is also fixed. In addition, a compensation algorithm is suggested to eliminate the current measurement offset in the AFE stage. The proposed SST achieves the unity power factor at the input AC current regardless of the reactive or nonlinear load and a low voltage regulation at the AC output. In order to verify the effectiveness of the SST, the 13.2 kV/10 kV SST prototype is built and tested. Both the simulation and the experimental results under actual 13.2 kV line show the excellent performance of the proposed SST scheme.

This paper proposes a novel three-phase voltage source inverter dead-time compensation strategy for accurate compensation in wide current regions of the inverter. In particular, an analysis of the output voltage distortion of the inverter, which appears as parasitic components of the switches, was conducted for proper voltage compensation in the low current region, and an on-line compensation voltage controller was proposed. Additionally, a new trapezoidal compensation voltage implementation method using the current phase was proposed to simplify realizing the trapezoidal shape of the three-phase compensation voltages. Finally, when the proposed dead-time compensation strategy was applied, the maximum phase voltage magnitude in the linear modulation voltage regions was defined to achieve smooth operation even at high modulation index. Simulations and experiments were conducted to verify the performance of the proposed dead-time compensation scheme.

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This paper describes the design and implementation of a unit module for a 10 kVA class 13.2 kV/220 V unidirectional solid-state transformer (SST) with silicon-carbide metal-oxide-semiconductor field-effect transistors. The proposed module consists of an active-front-end (AFE) converter to interface 1320 V AC voltage source to 2500 V DC link and an isolated resonant DC-DC converter for 500 V low-voltage DC output. The design approaches of the AFE and the isolated resonant DC-DC converters are addressed. The control structures of the converters are described as well. The experiments for the converters are performed, and results verify that the proposed unit module can be successfully adopted for the entire SST operation. (g 1 , g 2 , g 3 ,g 4 ) (g 1 , g 2 , g 3 ,g 4 ) (g 1 ,g 2 , g 3 , g 4 ) (g 1 ,g 2 , g 3 , g 4 )(1,1,0,0) (0,0,0,0) (0,0,1,1) (0,0,0,0)

This paper proposes a novel three-phase voltage source inverter dead-time compensation strategy for accurate compensation in wide current regions of the inverter. In particular, an analysis of the output voltage distortion of the inverter, which appears as parasitic components of the switches, has been conducted for proper voltage compensation in the low current region, and an on-line compensation voltage controller has been proposed. Also, a new trapezoidal compensation voltage implementation method using the current phase is proposed to simplify realizing the trapezoidal shape of the three-phase compensation voltages. Finally, when the proposed dead-time compensation strategy is applied, the maximum phase voltage magnitude in the linear modulation voltage regions is defined to achieve smooth operation even at high modulation index. Simulations and experiments were conducted to verify the performance of the proposed dead-time compensation scheme.