This paper presents a Chebyshev approximation based method for digital quadrature sine and cosine waveform synthesis. The spurious perfonnance of the Chebyshev approximation is improved by applying the symmetry properties between sine and cosine signals. The frequency synthesizer was modelled with register transfer level VHDL Simulation and synthesis results of the Chebyshev sinusoidal signal synthesizer are presented and compared withother direct digital sine and cosine synthesizers. The synthesis was carried out on a 0.35pm, 3.3 4-metal, n-well stanhrd cell process. According to the synthesis results the total design area is 5900 gates and the maximum system clock frequency 160 MHz.

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