Silicon films on sapphire have been implanted with energetic boron and phosphorus ions. The annealing behaviour of the implanted layer, measured by sheet conductivity, has been found to be almost the same as for implantations in bulk silicon.
A lateral double diffused DMOS (LDMOS) transistor has been integrated into a CMOS process. An effective RESURF of the drain drift region enables a high breakdown voltage of about 90V and GHz operation. The measured output power density is 1.4W/mm at 1GHz for a supply voltage of 70V. A power added efficiency (PAE) of 51% and an output power density of 1.2W/mm was obtained at 50V.
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