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A novel SO1 memory cell has been implemented in a 1.0-pm 256K SRAM witha 20-ns worst-case minimum WRITE time at +125"C, and providing a single event upset (SEW immunity of less than 1 x lO-'O errors/bit-day over temperature. The worstcase supply voltage for SEU was found to be 5.5 V, rather than the usually assumed 4.5 V. This is attributed to bipolar effects of the SO1 transistor, and thus has possible implications for SEU testing of all SO1 memories.

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