A generic and retargetable tool flow is presented that enables the export of timing data from software running on a cycle-accurate Virtual Prototype (VP) to a concurrent functional simulator. First, an annotation framework takes information gathered from running an application on the VP and automatically annotates the line-level delays back to the original source code. Then, a SystemC-based timed functional simulator runs the annotated source code much faster than the VP while preserving timing accuracy. This simulator is API-compatible with the multiprocessor's operating system. Therefore, it can compile and run unmodified applications on the host PC. This flow has been implemented for MuSIC(Multiple SIMD Cores) [6], a heterogeneous multiprocessor developed at Infineon to support Software Defined Radio (SDR). When compared with an optimized cycle-accurate VP of MuSIC on a variety of tests, including a multiprocessor JPEG encoder, the accuracy is within 20%, with speedups from 10x to 1000x.

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About the Cover Artist: Born in Aachen (Germany), KEF! has started with graffiti when he was 14 years old. At the age of 19 he began to expand his work on other surfaces as canvas and paper. Nowadays, he works with galleries on projects all over the world. His work is based on making researches about the feelings of freedom, independence and harmony and how they can get manifested through his paintings in interior and exterior surroundings. For more information see: www.kefart.com