No abstract

The power take-off (PTO) of a wave energy converter (WEC) converts mechanical power extracted from the waves into electrical power. Increasing PTO performance under several operational conditions is therefore essential to reduce the levelized cost of energy of a given wave energy concept and to achieve higher levels of technology readiness. A key task in the WEC design will then be the holistic assessment of the PTO performance in combination with other subsystems. It is hence important that WEC designers are aware of the different modeling options. This paper addresses this need and presents two alternative wave-to-wire modeling approaches based on a 250 kW modular electromechanical PTO coupled to an oscillating wave surge converter (OWSC) device. The first is a detailed and accurate offline model. The second model is a simplified and faster version of the first, being adequate for rapid analyses and real-time (RT) simulation. The paper presents the benchmarking of the offline model against the RT model and the hardware-in-the-loop (HIL) tests of the PTO. The normalized root-mean-square error (NRMSE) is considered as a quantitative indicator for the measurement of real-time and HIL test results against the offline simulation. Results show that the dynamics of the offline model are well represented by the RT model with execution times up to 10 times faster. The offline model also depicts well the behavior observed in the HIL tests with the NRMSE values for the PTO position, velocity, and force above 0.90, which shows the HIL test results replicates with fidelity the dynamic behavior of the complete model. Meaningful differences are however present and highlighted in this paper. An understanding of the advantages and drawbacks of these three approaches is fundamental to properly design a WEC during its project cycle and validate PTO concepts with a certain level of simplification.

In the recent years the computational units are optimized to reduce the computation time. Multiplier is an electronic circuit used in digital electronics and has a significant role in vlsi applications. The 4:2 compressors have a flexibility of switching between exact and appropriate operating modes. In the appropriate mode the dual quality compressors provides higher speeds and consumes low power. Using these compressors in the structures of parallel multipliers provides configurable multipliers whose accuracies (as well as their powers and speeds) may change dynamically during the runtime. The efficiencies of these compressors are used in another type of multiplier and are evaluated in 45 nm standard CMOS technology. By comparing the parameters of this multiplier with those of appropriate multipliers, the results indicate a better in almost all the aspects.

No abstract