Register Exchange (RE) and Traceback (TB) are the two known memory organization methods used by a Viterbi decoder. This paper describes a new traceback technique that utilizes a novel forward tracing algorithm, which can greatly cut down the latency at minimal hardware cost. The new technique is compared with the conventional traceback algorithm. As an example, the architecture design implementing this new traceback technique for a Grand Aliance HDTV Viterbi decoder is described. System level simulation verified the new traceback technique.

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