We demonstrate for the first time 85nm gate length enhancement and depletion mode InSb quantum well transistors with unity gain cutoff frequency, f T , of 305 GHz and 256 GHz, respectively, at 0.5V V DS , suitable for high speed, very low power logic applications. The InSb transistors demonstrate 50% higher unity gain cutoff frequency, f T , than silicon NMOS transistors while consuming 10 times less active power.

This paper describes for the first time, a high-speed and low-power III-V p-channel QWFET using a compressively strained InSb QW structure. The InSb p-channel QW device structure, grown using solid source MBE, demonstrates a high hole mobility of 1,230cm 2 /V-s. The shortest 40nm gate length (L G ) transistors achieve peak transconductance (G m ) of 510μS/μm and cut-off frequency (f T ) of 140GHz at supply voltage of 0.5V. These represent the highest G m and f T ever reported for III-V p-channel FETs. In addition, effective hole velocity of this device has been measured and compared to that of the standard strained Si p-channel MOSFET. IntroductionThe III-V compound semiconductor quantum-well field effect transistor (QWFET) is one of the most promising device candidates for future high-speed, low-power logic applications due to its high electron mobility. Recently, highperformance III-V n-channel QWFETs have been demonstrated [1][2][3][4]. However, for implementation of CMOS logic, there is a significant challenge of identifying high mobility III-V p-channel candidates [5]. In this work, we demonstrate for the first time a high-speed and low-power III-V p-channel QWFET using a compressively strained InSb QW structure, which achieves cut-off frequency (f T ) of 140GHz at transistor gate length (L G ) of 40nm and supply voltage (V CC ) of 0.5V. This represents the highest f T ever reported for III-V p-channel FETs.

The mobility and carrier concentration of a number of InSb-based modulation-doped quantum well heterostructures are examined over a range of temperatures between 4.5 and 300 K. Wide well ͑30 nm͒ and narrow well ͑15 nm͒ structures are measured. The temperature dependent mobilities are considered within a scattering model that incorporates polar optical and acoustic phonon scatterings, interface roughness scattering, and scattering from charged impurities both in the three-dimensional background and within a distributed "quasitwo-dimensional" doping layer. Room temperature mobilities as high as 51 000 cm 2 / V s are reported for heterostructures with a carrier concentration of 5.8ϫ 10 11 cm −2 , while low-temperature mobility ͑below 40 K͒ reaches 248 000 cm 2 / V s for a carrier concentration of 3.9ϫ 10 11 cm −2. A Schrödinger-Poisson model is used to calculate band structures in the material and is shown to accurately predict carrier concentrations over the whole temperature range. Low-temperature mobility is shown to be dominated by remote ionized impurity scattering in wide well samples and by a combination of ionized impurity and interface roughness scattering in narrow well samples.

The heterogeneous integration of InSb quantum well transistors onto silicon substrates is investigated for the first time. 85 nm gate length FETs with f T ¼ 305 GHz at V ds ¼ 0.5 V and DC performance suitable for digital logic are demonstrated on material with a buffer just 1.8 mm thick. An initial step towards integrating InSb FETs with mainstream Si CMOS for high-speed, energy-efficient logic applications has been achieved.