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Continued reduction in resistance-capacitance (RC) delays in nano-electronic Cu interconnect structures will require new materials with increasingly lower dielectric constants (i.e. low-k). Significant reductions in RC delay can be achieved by reducing the dielectric constant of the relatively high dielectric constant Cu capping/etch stop layer. However, this risks comprising the required barrier performance of this material to the diffusion of Cu, H 2 O, and other species. In this regard, critical thresholds for the diffusion of water and solvents through low-k a-SiO x C y N z :H dielectrics of varying composition were investigated using a combination of X-ray reflectivity mass density and positronium annihilation lifetime spectroscopy pore size metrologies. It was observed that hermetic low-k a-SiO x C y N z :H dielectrics were achieved only at mass densities >2.0 g/cm 3 and when the pore diameter was less than twice the molecular diameter of water. The implications of these critical nano-porosity thresholds on continued scaling of low-k diffusion barrier and ILD materials are discussed as well as methods for overcoming these limitations.

Atomic layer deposited (ALD) high-dielectric-constant (high-k) materials have found extensive applications in a variety of electronic, optical, optoelectronic, and photovoltaic devices. While electrical, optical, and interfacial properties have been the primary consideration for such devices, thermal and mechanical properties are becoming an additional key consideration for many new and emerging applications of ALD high-k materials in electromechanical, energy storage, and organic light emitting diode devices. Unfortunately, a clear correspondence between thermal/mechanical and electrical/optical properties in ALD high-k materials has yet to be established, and a detailed comparison to conventional silicon-based dielectrics to facilitate optimal material selection is also lacking. In this regard, we have conducted a comprehensive investigation and review of the thermal, mechanical, electrical, optical, and structural properties for a series of prevalent and emerging ALD high-k materials including aluminum oxide (Al 2 O 3 ), aluminum nitride (AlN), hafnium oxide (HfO 2 ), and beryllium oxide (BeO). For comparison, more established silicon-based dielectrics were also examined, including thermally grown silicon dioxide (SiO 2 ) and plasma-enhanced chemically vapor deposited hydrogenated silicon nitride (SiN:H). We find that in addition to exhibiting high values of dielectric permittivity and electrical resistance that exceed those of SiO 2 and SiN:H, the ALD high-k materials exhibit equally exceptional thermal and mechanical properties with coefficients of thermal expansion ≤ 6 × 10 -6 / • C, thermal conductivites (κ) of 3-15 W/m K, and Young's modulus and hardness values exceeding 200 and 25 GPa, respectively. In many cases, the observed extreme thermal/mechanical properties correlate with the presence of crystallinity in the ALD high-k films. In contrast, some of the electrical and optical properties correlate more strongly with the percentage of ionic vs. covalent bonds present in the high-k film. Overall, the ALD high-k dielectrics investigated concurrently exhibit compelling thermal/mechanical and electrical/optical properties. The drive to reduce gate leakage currents in highly scaled complementary metal-oxide-semiconductor (CMOS) transistors has led to the exploration and development of a wide variety of high-dielectricconstant (high-k) materials to replace silicon dioxide (SiO 2 ) as the insulating gate dielectric material.1-8 Many of these same high-k materials have found additional applications in future non-CMOS logic and memory storage products such as solid-state electrolytes in resistive switching devices, 9,10 tunnel barriers in spin-transport devices, 11 and as a ferroelectric in magnetoelectric devices. While electrical, physical, and thermodynamic properties have clearly been a key consideration in all of the above applications, thermal properties have become an additional important consideration for higk-k dielectrics as aggressive dimensional scaling of devices has created the need to dissipate ...

Electrical leakage in low-k dielectric/Cu interconnects is a continuing reliability concern for advanced <22 nm technologies. One leakage mechanism deserving increased attention is electron transport across the Cu/dielectric capping layer interface. The Schottky barrier formed at this interface is an important parameter for understanding charge transport across this interface. In this report, we have utilized x-ray photoelectron spectroscopy to investigate the Schottky barrier formed at the interface between polished Cu substrates and standard low-k a-SiC(N):H dielectric capping layers deposited by Plasma Enhanced Chemical Vapor Deposition. The authors find the Schottky Barrier at this interface to range from 1.45 to 2.15 eV depending on a-SiC(N):H composition and to be largely independent of various in situ plasma pretreatments.

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