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We demonstrated a sidewall spacer nanofabrication technique for nanogap electrodes fabrication. Nanogap between gold and polycrystalline silicon (ploy-Si) electrodes is defined without using any advanced lithographic techniques. The feature size of nanogap electrodes fabricated using this technique is mainly determined by the thickness of sidewall spacer. The proposed technique showed that reproducible nanogap distances from 10 to 100 nm on the 6 in. wafer were easily obtained. Binding of 15 nm gold nanoparticles across the 10 nm electrodes leading to a drastic change of the electrical conductance has also been demonstrated. Under a bias of 3 V, the conductive current increases from 2 pA to 300 nA after binding of 15 nm gold nanoparticles across the 10-nm electrodes. We believed that this technique can be contributed to the development of high-density nanogap electrodes for applications in biomolecules or nanoparticles detection.

In this paper, a programmable multiple-sequence generation scheme, which is constructed from a twodimension-like feedback shift register structure, to generate a set of deterministic sequence of vectors followed by pseudo-random vectors is presented. A sequence segmentation method is employed to handle a long sequence of vectors. The proposed scheme has a regular structure, and the sequences so generated are more efficient in detecting faults for sequential circuit testing, stuck-open fault testing and delay fault testing. Hence, it is very suitable for the BIST application for MCM testing.

The increase of array size and decrease of cell size make the testing of infrared focal plane array (FPA) being difticult. A design for test scheme, cross-check test, for infrared focal plane array (FPA) is presented in this paper. For an array size of M by N, the testing times can be reduced from the order of M*N to M+N. Analysis on the fault detectability of the proposed test scheme is also presented in this paper.

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