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A 0.8 V low power down-conversion self-oscillating mixer (SOM) is presented in this paper. The proposed SOM is constructed by connecting two sub-circuits of a sub-harmonic mixer and a differential Colpitts voltage-controlled oscillator (VCO) in a cascaded configuration. Three design concepts are utilized in the differential VCO including a forward-body-bias method, a negative conductance boosting configuration, and an enhanced swing technique for lowering the supply voltage to save the power consumption. The presented SOM is simulated with TSMC 0.18um 1P6M CMOS process. VCO exhibits a phase noise of -114 dBc/Hz at 1 MHz offset frequency with an output power level of -3.8 dBm. The designed SOM demonstrates a conversion gain of 9.4 dB and an input third-order intercept point (IIP3) of -3.8 dBm at 8 GHz with a total power consumption of 9.8 mW. The chip size including I/O pads for measurement is 1.65×0.95 mm 2 .

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