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A high-gain folded cascode operational amplifier is presented. Structure of folded cascode operational amplifier and manual calculations are discussed in detail. Folded cascode structure for the input stage is adopted. Folded cascode structure can increase the gain and the value of PSRR. Folded cascode structure can also allow self-compensation at the output. The operational amplifier is designed in 0.35μm CMOS process with 5V power supply. The operational amplifier has high-gain and work steadily. The results of SPICE simulations are shown that the operational amplifier achieved dc gain of 110dB with unity-gain bandwidth of 74.3MHz and phase margin of 54.4 degree.

A design project of 16 bit RISC MCU with full scan structure by the tool of SYNOPSYSTM DFT COMPILER. The flip-flops can be linked into the chains; the memory modules in the MCU were tested by the technology of BIST; and the circuits were tested by the test vectors by ATPG. The chip test circuit include 8 chains, and cover rate can reach at 99.20%.

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Σ-Δ modulator structure is increasingly becoming complex, it is very necessary to improve the design efficiency by the level of behavior model in the simulation. The paper discussed several important Σ-Δ modulators with ideal factors, and gives corresponding behavior model. Then, the paper shows a behavior level design with non-ideal factors. Under the condition that sample rate is 256 and input signal frequency is 250 KHz, the SNR can get 105 dB, the effective bit can get 16 bit. It can be used in audio and electronic equipment.