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Integration of electrodes in Si channels using low temperature polymethylmethacrylate bonding Abstract. The Integrated Circuits Design Research Laboratory at Southern Illinois University Edwardsville (SIUE) has been collaborating over the past several years with the Nuclear Reactions Group at Washington University (WU) on the development of a family of custom, multi-channel Integrated Circuits (ICs). To date, the collaboration has successfully produced two micro-chips. The first was an analog shaped and peak sensing chip known as HINP16C (Heavy Ion Nuclear Physics -16 Channel). The second chip, christened PSD8C (Pulse Shape Discrimination -8 Channel), was designed to logically complement (in terms of detector types) the HINP16C chip. The HINP16C chip, for use with solid-state detectors, produces sparsified analog pulse trains for both linear (pulse height) and timing (relative to an external reference) signals. A shaper and peak detector are implemented in the linear branch, and a pseudo Constant-Fraction Discriminator (CFD) and Time-to-Voltage Converter (TVC) are implemented in the logic/timing branch. The internal and external gain options make the chip suitable for use in a wide variety of applications. PSD8C greatly simplifies the pulse-processing electronics needed for large arrays of scintillation detectors. As the PSD8C employs user-controlled, multi-region charge integration, particle identification is inherent in the design. Each of the three pulseheight sub-channels consists of a gated integrator with eight programmable charging rates and an externally programmable gate generator that defines the start (with 4 time ranges) and the width (with 4 time ranges) of the gate, relative to an external discriminator signal. Moreover, each channel on the chip also contains a TVC. This paper describes the design, capabilities, and features of the HINP16C and PSD8C ICs along with a description of how the chips are being used. It also discusses modifications and enhancements which have been made to both chips and their associated prototypical systems in order to improve ease of use and increase performance.