The hardware and software design method of reconfigurable embedded NC system which makes use of FPGA’s abundant logic resources and programmable characteristics is presented. It introduces the scheme of a embedded NC system which has regarded FPGA as the control center. It mainly represents the thought of reconfigurable design, the speed control of stepping motor, and the communication of FPGA and PC. As a result, this system has fast response and strong reconfiguration ability. It can reduce the number of peripheral interface devices and result in costreduction.
Structure and working principles of eddy current retarder (ECR) are discussed, as well as performance requirements of real-time virtual testing and simulation. On the basis of hardware testing platform, virtual models of vehicle and retarder are embedded into application program. In the testing system, Vega API function library is used for second development to control the 3D models, and Visual C++ is used for mathematical models call from MATLAB to simulate the working condition. Integrated with virtual instrument and virtual environment, the limitation of former simulation is broken through. Monitoring and testing on eddy current retarder are achieved efficiently and visually. Besides, the virtual test data is not only compared with the practical vehicle test data to correct the technical parameter of eddy current retarder, but also compared with the simulation of mathematical models for further study. The testing system gives evaluation on the performance of the retarder in different vehicles, so it expands application range and heightens testing efficiency.
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