Various large-area growth methods for two-dimensional transition metal dichalcogenides have been developed recently for future electronic and photonic applications. However, they have not yet been employed for synthesizing active pixel image sensors. Here, we report on an active pixel image sensor array with a bilayer MoS2 film prepared via a two-step large-area growth method. The active pixel of image sensor is composed of 2D MoS2 switching transistors and 2D MoS2 phototransistors. The maximum photoresponsivity (Rph) of the bilayer MoS2 phototransistors in an 8 × 8 active pixel image sensor array is statistically measured as high as 119.16 A W−1. With the aid of computational modeling, we find that the main mechanism for the high Rph of the bilayer MoS2 phototransistor is a photo-gating effect by the holes trapped at subgap states. The image-sensing characteristics of the bilayer MoS2 active pixel image sensor array are successfully investigated using light stencil projection.

Over the last decade, gallium nitride has emerged as an excellent material for the fabrication of power devices. Among the semiconductors for which power devices are already available on the market, GaN has the widest energy gap, the largest critical field, the highest saturation velocity, thus representing an excellent material for the fabrication of high speed/high voltage components.The presence of spontaneous and piezoelectric polarization allows to create a 2-dimensional electron gas, with high mobility and large channel density, in absence of any doping, thanks to the use of AlGaN/GaN heterostructures. This contributes to minimize resistive losses; at the same time, for GaN transistors switching losses are very low, thanks to the small parasitic capacitances and switching charges. Device scaling and monolithic integration enable high frequency operation, with consequent advantages in terms of miniaturization.For high power/high voltage operation, vertical device architectures are being proposed and investigated, and 3-dimensional structuresfin-shaped, trench-structured, nanowire-basedare demonstrating a great potential. Contrary to silicon, GaN is a relatively young material: trapping and degradation processes must be understood and described in detail, with the aim of optimizing device stability and reliability. This tutorial paper describes the physics, technology and reliability of GaN-based power devices: in the first part of the article, starting from a discussion of the main properties of the material, the characteristics of lateral and vertical GaN transistors are discussed in detail, to provide guidance in this complex and interesting field. The second part of the paper focuses on trapping and reliability aspects: the physical origin of traps in GaN, and the main degradation mechanisms are discussed in detail. The wide set of referenced papers and the insight on the most relevant aspects gives the reader a comprehensive overview on present and next-generation GaN electronics. IntroductionOver the past decade, gallium nitride has emerged as an excellent material for the fabrication of power semiconductor devices. Thanks to the unique properties of GaN, diodes and transistors based on this material have excellent performance, compared to their silicon counterparts, and are expected to find wide application in the next-generation power converters. Owing to the flexibility and the energy efficiency of GaN-based power converters, the interest towards this technology is rapidly growing: the aim of this tutorial is to review the most relevant physical properties, the operating principles, the fabrication parameters, and the stability/reliability issues of GaN-based power transistors. For introductory purposes, we start summarizing the physical reasons why GaN transistors achieve a much better performance than the corresponding silicon devices, to help the reader understanding the unique advantages of this technology.The properties of GaN devices allow the fabrication of high-efficiency (near or above 99 %)...

In this work we report about the derivation of a physics-based compact model of Random Telegraph Noise (RTN) in HfO2-based Resistive Random Access Memory (RRAM) devices. Starting from the physics of charge transport, which is different in the high and low resistive states (HRS and LRS), we explore the mechanisms responsible for RTN exploiting a hybrid approach, based on self-consistent physics simulations and geometrical simplifications. Then, we develop a simple yet effective physics-based compact model of RTN valid in both states, which can be steadily integrated in state-of-the-art RRAM compact models. The RTN compact model predictions are validated by comparison with both a large experimental dataset obtained by measuring RRAM devices in different conditions, and data reported in the literature. In addition, we show how the model enables advanced circuit simulations by exploring three different circuits for memory, security, and logic applications.