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This paper deals with a comparison between digital and analogue implementation of a synchronous detection algorithm. The commonly used implementation methods of synchronous detection are presented in the paper. The paper describes FPGA-based digital and analogue hardware approaches, focusing on the digital design. The characteristics of used analogue-to-digital converters are measured. Both proposed approaches are directly compared in terms of sensitivity and long-term stability. The achieved results, along with identified limitations and proposed improvements are widely discussed.