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With a paradigm shift to the multicore era, the analysis of power management techniques has become crucial. Besides, allowing applications at different levels of criticality to run on the same platform introduces higher complexity to the power and performance analysis of System-on-Chips. This work presents a system-level simulation framework and an architectural template for power management in multicore mixed-criticality systems to cope with this problem. The framework provides an efficiently emulated dynamic voltage and frequency scaling (DVFS) through full-system simulation. The architectural template uses a hardware-dedicated power manager and a real-time monitoring mechanism for critical applications. The power manager is able to guarantee criticality requirements while showing significant reduction in power consumption in experimental evaluations.

Dealing with resource constraints is an inevitable feature of embedded systems. Power and performance are the main concerns beside others. Pre-silicon analysis of power and performance in today’s complex embedded designs is a big challenge. Although RTL (Register-Transfer Level) models are more precise and reliable, system-level modeling enables the power and performance analysis of complex and dense designs in the early design phase. Virtual prototypes of systems prepared through architectural simulation provide a means of evaluating non-existing systems with more flexibility and minimum cost. Efficient interplay between power and performance is a key feature within virtual platforms. This article focuses on dynamic voltage and frequency scaling (DVFS), which is a well-known system-level low-power design technique together with its more efficient implementations modeled through architectural simulation. With advent of new computing paradigms and modern application domains with strict resource demands, DVFS and its efficient hardware-managed solutions get even more highlighted. This is mainly because they can react faster to resource demands and thus reduce induced overhead. To that end, they entail an effective collaboration between software and hardware. A case review in the end wraps up the discussed topics.

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