Bounded Model Checking (BMC) based on Satisfiability Modulo Theories (SMT) is well known by its capability to verify software. However, its use as optimization tool, to solve hardware and software (HW-SW) partitioning problem, is something new. In particular, its integration with the Maximum Satisfiability solver νZ tool, which provides a portfolio of approaches for solving linear optimization problems over SMT formulas, is unprecedented. We present new alternative approaches to solve the HW-SW partitioning problem. First, we use SMT-based BMC in conjunction with a multi-core support using Open Multi-Processing to create four variants to solve the partitioning problem. The multi-core SMT-based BMC approaches allow initializing many verification instances based on the number of available processing cores, where each instance checks a different optimum value until the optimization problem is satisfied. Additionally, we integrate the νZ into the BMC, making it as a specialized solution for optimization in a single-core environment. We implement all five approaches on top of the Efficient SMTBased Context-Bounded Model Checker (ESBMC) and compare them to a state-of-the-art optimization tool. Experimental results show that there is no single optimization tool to solve all HW-SW partitioning benchmarks, but based on medium-size benchmarks, ESBMC-νZ had better performance.

Bounded Model Checking (BMC) based on Satisfiability Modulo Theories (SMT) is well known by its capability to verify software. However, its use as optimization tool, to solve hardware and software (HW-SW) partitioning problem, is something new. In particular, its integration with the Maximum Satisfiability solver νZ tool, which provides a portfolio of approaches for solving linear optimization problems over SMT formulas, is unprecedented. We present new alternative approaches to solve the HW-SW partitioning problem. First, we use SMT-based BMC in conjunction with a multi-core support using Open Multi-Processing to create four variants to solve the partitioning problem. The multi-core SMT-based BMC approaches allow initializing many verification instances based on the number of available processing cores, where each instance checks a different optimum value until the optimization problem is satisfied. Additionally, we integrate the νZ into the BMC, making it as a specialized solution for optimization in a single-core environment. We implement all five approaches on top of the Efficient SMT-Based Context-Bounded Model Checker (ESBMC) and compare them to a state-of-the-art optimization tool. Experimental results show that there is no single optimization tool to solve all HW-SW partitioning benchmarks, but based on medium-size benchmarks, ESBMC-νZ had better performance.