On-focal-plane signal processing circuits for enhancement of IR imager performance are presented. To enable the detection of high background IR images, an in-pixel current-mode background suppression scheme is presented. The background suppression circuit consists of a current memory placed in the feedback loop of a CTIA and is designed for a thousand-fold suppression of the background flux, thereby easing circuit design constraints, and assuring BLIP operation even with detectors having large response non-uniformities. For improving the performance of low-background IR imagers, an onchip column-parallel analog-to-digital converter (ADC) is presented. The design of a 10-bit ADC with 50 µm pitch and based on sigma-delta (Σ-∆) modulation is presented. A novel IR imager readout technique featuring photoelectron counting in the unit cell is presented for ultra-low background applications. The output of the unit cell is a digital word corresponding to the incident flux density and the readout is noise free. The design of low-power (< 5 µW), sub-electron input-referred noise, high-gain (> 100,000), small real-estate (60 µm pitch) self-biased CMOS amplifiers required for photon counting are presented.

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