The design of Siwa 1 , a compact low power custom system on chip (SoC), targeted for implantable/wearable applications, is reported in this paper. Siwa is based on a RISC-V RV32I architecture. It has a centrally controlled non-pipelined structure, and it includes a control interface for an integrated sensing and stimulation device for biological tissues as well as standard communication interfaces. Siwa was developed from scratch using System Verilog, and implemented in a 180nm CMOS technology; Siwa includes a latch based register file c apable to read and write in one clock cycle with an area 30% smaller and a power consumption 25% lower with respect to an equivalent flip flop implementation; also, it has an estimated average power consumption of 70μW (48pJ/cycle) which is comparable to other micro-controllers commonly used in IMD applications.

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