This paper presents a hardware implementation of a soft-decision Reed-Solomon (RS) decoder, based on the stochastic Chase algorithm. This decoder achieves a coding gain of at least 0.45 dB at FER=10 −4 for the well-known RS(255,239) code. To the best of our knowledge this is the highest reported coding gain for a hardware implementation of soft-decision RS(255,239) decoder. The decoder is implemented on a Virtex-5 FPGA and works at 800 Mb/s. The proposed decoder has a flexible architecture and is well suited for applications requiring different throughputs and decoding performance.