Over the past decade, degradation and power loss have been observed in PV modules resulting from the stress exerted by system voltage bias. This is due in part to qualification tests and standards that do not adequately evaluate for the durability of modules to the long-term effects of high voltage bias experienced in fielded arrays. High voltage can lead to module degradation by multiple mechanisms. The extent of the voltage bias degradation is linked to the leakage current or coulombs passed from the silicon active layer through the encapsulant and glass to the grounded module frame, which can be experimentally determined; however, competing processes make the effect non-linear and history-dependent.Appropriate testing methods and stress levels are described that demonstrate module durability to system voltage potentialinduced degradation (PID) mechanisms. This information, along with outdoor testing that is in progress, is used to estimate the acceleration factors needed to evaluate the durability of modules to system voltage stress. Na-rich precipitates are observed on the cell surface after stressing the module to induce PID in damp heat with negative bias applied to the active layer.

IEC 62804 Ed. 1, System voltage durability qualification test for crystalline silicon modules, is being developed. First, two module designs are compared in chamber and in the natural environment of Florida (USA). From these results, a stress level of 60°C, 85% relative humidity, a bias of nameplate system voltage, 96 h dwell, and a pass/fail limit of 5% relative power degradation at 25°C and 1000 W/m 2 irradiance is initially proposed for the draft protocol. This paper next focuses on one of the main controversies within the development of this standard-the use of damp heat in an environmental chamber versus a conductive foil to complete the circuit to ground during the test. Conventional 60-cell multicrystalline silicon modules with (i) a standard aluminum frame, (ii) a modified frame, and (iii) a rear rail design were tested for potential-induced degradation (PID). These three module designs were stressed at the draft protocol conditions stated above and outdoors, applying negative system voltage bias during hours of daylight to simulate array voltage. The damp heat environmental chamber tests run according to the protocol distinguish the relative resistance of five module designs to PID in the field and correctly rankorder the durability in the field to the extent tested (up to 28 months). Finally, the degradation rate is determined at 25°C using a foil to ground the module face on a subset of modules susceptible to PID, and the results with respect to measured field performance of the modules are discussed.

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In wireless networks with a low duty cycle, the radio is operational for only a small percentage of the time. A sleep timer is used to synchronize the data transmission and reception. The total system power is then limited by the sleep power and the sleep timer frequency stability. Low-frequency crystal oscillators are a common choice for sleep timers due to their excellent long-term stability, frequency stability over temperature, and very low power consumption. However, the external crystal cost and board area are undesired. If an integrated oscillator is used as an alternative, the frequency variation must be minimized so the sleep time can be maximized.Several integrated oscillators with good frequency stability have been proposed in recent publications. In [1], feed-forward correction is used to achieve a stable frequency over temperature, but the voltage sensitivity and die area are large. In [2], self-chopping is used and excellent stability results are achieved at the cost of relatively high power consumption. In [3], offset cancellation is used to allow lower power operation while achieving stable temperature performance. However, long-term stability is limited by flicker noise to 20ppm for intervals over 0.5s. Also, low power systems may have supplies that are allowed to droop while in sleep, so improved frequency stability over supply variation is desired. In this work, an RC oscillator with improved long-term stability and frequency stability over supply voltage is presented.As shown in Fig. 17.8.1, the implemented RC oscillator consists of an RC network, and an inverting gain element from a resistor terminal to a capacitor terminal and another inverting gain element from the common resistor/capacitor terminal back to the resistor terminal. For high gain, the two inverting elements consist of three and five inverters, respectively. A simple regulator, consisting of an NMOS voltage follower and a replica inverter that is flipped and biased by a reference current, produces a local regulated supply for the inverters. This local supply is well below the standard core voltage for the technology. Therefore the inverters have very low average current because they are biased in weak inversion at their switching point.To analyze the frequency variation due to noise and other non-idealities, we define the relative inverter switching point as K SW =V SW /VDD LOCAL or, in other words, the ratio between the input=output inverter switching voltage V SW and the local supply voltage VDD LOCAL . Ignoring inverter delays and output resistance, the voltage at the common RC node will swing from (K SW +1)VDD LOCAL to (K SW −1)VDD LOCAL , as shown in Fig. 17.8.2. It can be shown that the ideal oscillation period equals When K SW =0.5, we get 50% duty cycle, oscillation period t 0 = RC•ln(9) ≈ 2.2RC and the lowest sensitivity to K SW variation.For a low frequency oscillator like this, the inverters driving the resistor and the capacitor will have much lower output resistance than the resistor R, and therefore contribute lit...

As photovoltaic (PV) penetration of the power grid increases, it becomes vital to know how decreased power output may affect cost over time. In order to predict power delivery, the decline or degradation rates must be determined accurately. At the Performance and Energy Rating Testbed (PERT) at the Outdoor Test Facility (OTF) at the National Renewable Energy Laboratory (NREL) more than 40 modules from more than 10 different manufacturers were compared for their long-term outdoor stability. Because it can accommodate a large variety of modules in a limited footprint the PERT system is ideally suited to compare modules side-by-side under the same conditions.