A multi-band (bands I, II, V, VIII [option]) single-chip RFIC has been implemented in 0.18μm SiGe BiCMOS process for WCDMA/HSDPA applications. The direct-conversion receiver achieves competitive system performance: -110.5dBm sensitivity, 20dB and 12dB blocking margin for ACS case 1 and case 2, respectively, and excellent in-band blocking margins. The direct-modulation transmitter achieves more than 90dB dynamic range, and excellent EVM performance: <3.5%. In Band I, the RX section and TX section draw each 35mA and 65mA, respectively. Two dedicated on-chip fast-settling fractional-N synthesizers provide LOs for both RX and TX. The chip is housed in a 5x5 mm 2 81-pin VFBGA package.
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