In this paper a WCDMA/GSM/DCS/PCS multimode frequency synthesizer is presented. It consists in a double loop synthesizer with a programmable divider between each integer synthesizer in order to provide fractional steps. The synthesizer has been implemented in a STMicroelectronics 0.25 µm RF BiCMOS technology. Measured phase noise at 400 kHz of the 3.8 Ghz carrier is -118 dBc/Hz. Power consumption is about 21 mA from a 2.5 V battery.
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